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EL5130, EL5131
Data Sheet May 4, 2007 FN7381.4
300MHz Low Noise Amplifiers
The EL5130 and EL5131 are ultra-low voltage noise, high speed voltage feedback amplifiers that are ideal for applications requiring low voltage noise, including communications and imaging. These devices offer extremely low power consumption for exceptional noise performance. Stable at gains as low as 5, these devices offer 100mA of drive performance. Not only do these devices find perfect application in high gain applications, they maintain their performance down to lower gain settings. These amplifiers are available in small package options (SOT-23) as well as the industry-standard SOIC packages. All parts are specified for operation over the -40C to +85C temperature range.
Features
* 300MHz -3dB bandwidth * Ultra low noise = 1.8nV/Hz * 350V/s slew rate * Low supply current = 4mA * Single supplies from 5V to 12V * Dual supplies from 2.5V to 6V * Fast disable on the EL5130 * Low cost * Pb-free plus anneal available (RoHS compliant)
Applications
* Imaging * Instrumentation * Communications devices
Ordering Information
PART PART NUMBER MARKING EL5130IS EL5130ISZ (Note) EL5130IS-T7 EL5130ISZ-T7 (Note) EL5130IS-T13 EL5130ISZ-T13 (Note) EL5131IW-T7 EL5131IWZ-T7 (Note) EL5131IW-T7A 5130IS 5130ISZ TAPE & REEL PACKAGE 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) PKG. DWG. # MDP0027 MDP0027
Pinouts
EL5130 (8 LD SOIC) TOP VIEW
NC 1 8 CE + 7 VS+ 6 OUT 5 NC
5130IS 5130ISZ
7" 7"
MDP0027 MDP0027
IN- 2 IN+ 3
5130IS 5130ISZ
13" 13"
MDP0027 MDP0027
VS- 4
EL5131 (5 LD SOT-23) TOP VIEW
OUT 1 5 VS+
BBAA BRAA BBAA
7" (3k pcs) 7" (3k pcs)
5 Ld SOT-23 MDP0038 5 Ld SOT-23 MDP0038 (Pb-free)
VS- 2 IN+ 3
+4 IN-
7" 5 Ld SOT-23 MDP0038 (250 pcs) 7" 5 Ld SOT-23 MDP0038 (250 pcs) (Pb-free)
EL5131IWZ-T7A BRAA (Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004, 2006, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
EL5130, EL5131
Absolute Maximum Ratings (TA = +25C)
Slewrate between VS+ and VS- . . . . . . . . . . . . . . . . . . . . . . . . 1V/s Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . 13.2V IIN-, IIN+, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +125C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER VOS TCVOS IB IOS TCIOS PSRR CMRR CMIR RIN CIN IS AVOL VO Offset Voltage
VS+ = +5V, VS- = -5V, RL = 500, RG = 50, CL = 5pF, TA = +25C, Unless Otherwise Specified. CONDITIONS MIN -0.9 Measured from TMIN to TMAX VIN = 0V VIN = 0V Measured from TMIN to TMAX VS = 4.75V to 5.25V VIN = 3.0V Guaranteed by CMRR test Common mode 75 95 3 5 1.5 -500 TYP 0.2 0.8 2.27 100 -3 90 110 3.3 20 1 3.0 VOUT = 2.5V, RL = 1k to GND RL = 1k, RF = 900, RG = 100 RL = 150 10 3.5 3.5 50 3.54 16 3.8 3.3 100 300 60 1500 RL = 1k, CL = 6pF VS = 5V, RL = 150, VOUT = 2.5V 0.1VSTEP 0.1VSTEP 225 55 350 TBD TBD 14 AV = +2, RF = 1k AV = +2, RF = 1k f = 10kHz f = 10kHz 0.01 0.01 1.8 1.1 4.1 3.3 500 MAX 0.9 UNIT mV V/C A nA nA/C dB dB V M pF mA kV/V V V mA MHz MHz MHz V/s ns ns ns % nV/Hz pA/Hz
DESCRIPTION
Offset Voltage Temperature Coefficient Input Bias Current Input Offset Current Input Bias Current Temperature Coefficient Power Supply Rejection Ratio Common Mode Rejection Ratio Common Mode Input Range Input Resistance Input Capacitance Supply Current Open Loop Gain Output Voltage Swing
ISC BW BW GBWP PM SR tR, tF tPD tS dG dP eN iN
Short Circuit Current -3dB Bandwidth 0.1dB Bandwidth Gain Bandwidth Product Phase Margin Slew Rate Rise Time, Fall Time Propagation Delay 0.01% Settling Time Differential Gain Differential Phase Input Noise Voltage Input Noise Current
RL = 10 AV = +5, RL = 500 AV = +5, RL = 500
2
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
90 VS=5V NORMALIZED GAIN (dB) 70 MAGNITUDE (dB) 72 PHASE () 0 5 PHASE 3 180 PHASE () 300
50
144
1
GAIN
60
30
216
-1 VS=5V AV=-5 -3 RG=50 RL=500 CL=5pF -5 0.1 1
-60
10
288
-180
-10 1k
10k
100k
1M
10M
360 100M 500M
10 FREQUENCY (MHz)
100
-300 1k
FREQUENCY (Hz)
FIGURE 1. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 2. GAIN AND PHASE vs FREQUENCY (INVERTING)
5 VS=5V AV=+5 3 RG=50 RL=500 CL=5pF 1 GAIN
300
5 VS=5V RG=50 3 RL=500 CL=5pF 1 AV=+5 -1 AV=+10 -3 AV=+20
NORMALIZED GAIN (dB)
180 PHASE ()
60
-1 PHASE
-60
-3
-180
-5 0.1
1
10 FREQUENCY (MHz)
100
-300 1k
NORMALIZED GAIN (dB)
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 3. GAIN AND PHASE vs FREQUENCY (NON-INVERTING)
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS AV+
300 VS=5V RG=50 180 RL=500 CL=5pF 60
5 VS=5V AV=+5 3 RG=50 CL=5pF 1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
RL=1k RL=500 RL=150 RL=100
-60 AV=+10 -180 AV=+20 -300 0.1 1 10 FREQUENCY (MHz) 100
AV=+5
-1
-3
1k
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS AV+
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS RL (AV=+5)
3
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
5 VS=5V AV=+10 3 RG=50 CL=5pF 1 5 VS=5V AV=+5 3 RL=500 CL=5pF 1 RF=1k RF=500
NORMALIZED GAIN (dB)
-1 RL=500 -3 RL=150 RL=100 -5 0.1 1 10 FREQUENCY (MHz)
NORMALIZED GAIN (dB)
RL=1k
-1
RF=200 RF=100
-3
100
1k
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS RL (AV=+10)
5 VS=5V AV=+10 3 RL=500 CL=5pF 1 RF=2.25k -1 RF=1.125k RF=450 RF=225 -5 0.1 1 10 FREQUENCY (MHz) 100 1k
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS RF (AV=+5)
5 VS=5V AV=+5 3 RG=50 RL=500 1 CL=10pF CL=6pF -3 CL=22pF CL=15pF
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
-1
-3
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RF (AV=+10)
5 VS=5V AV=+10 3 RG=50 RL=500 1 CL=22pF CL=12pF -3 CL=47pF CL=33pF
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS CL (AV=+5)
5 VS=5V AV=+5 3 RG=50 RL=500 CL=5pF 1 CIN=2.7pF CIN=1pF -3 CIN=8.2pF CIN=4.7pF
NORMALIZED GAIN (dB)
-1
NORMALIZED GAIN (dB) 1k
-1
-5 0.1
1
10 FREQUENCY (MHz)
100
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CL (AV=+10)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS CIN- (AV=+5)
4
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
5 VS=5V AV=+10 3 RG=50 RL=500 CL=5pF 1 CIN=15pF CIN=10pF -3 CIN=25pF CIN=18pF NORMALIZED GAIN (dB) 5 VS=5V AV=+5 3 RG=50 RL=500 CL=5pF 1 VS=2.5 VS=3 -3 VS=4 VS=5 -5 0.1 1 10 FREQUENCY (MHz) 100 1k -5 0.1 1 10 FREQUENCY (MHz) 100 1k VS=6
NORMALIZED GAIN (dB)
-1
-1
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS CIN(AV=+10)
5 VS=5V AV=+10 3 RG=50 RL=500 1
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS VS (AV=+5)
5 VS=5V AV=+5 3 RG=50 RL=500 CL=5pF 1
NORMALIZED GAIN (dB)
VS=6 VS=2.5 VS=3
-1
NORMALIZED GAIN (dB)
-1 -3dB @ 360MHz -3
-3
VS=4 VS=5
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
-5
1
10
100
1k
FREQUENCY (MHz)
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS VS (AV=+10)
0.5 VS=5V AV=+5 0.3 RG=50 RL=500 CL=5pF 0.1
FIGURE 16. FREQUENCY RESPONSE (-3dB ROLL-OFF)
-40 VS=5V AV=+5 -60 RG=50 RL=500 GAIN (dB) -0.1dB @ 230MHz 1 10 100 1k -80
NORMALIZED GAIN (dB)
-0.1
-100
-0.3
-120
-0.5
-140 0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 17. FREQUENCY RESPONSE (0.1dB GAIN FLATNESS)
FIGURE 18. INPUT AND OUTPUT ISOLATION FOR DISABLE AMPLIFIER
5
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
10 AV=+10 VS=5V -10 PSRR (dB) VS+ VSCMRR (dB) -10 VS=5V AV=+5 -30 RL=150
-30
-50
-50 VSVS+ -90 1k 10k 100k 1M 10M 100M 500M
-70
-70
-90
-110 0.01
0.1
1
10
100
1k
FREQUENCY (Hz)
FREQUENCY (MHz)
FIGURE 19. PSRR vs FREQUENCY
FIGURE 20. CMRR vs FREQUENCY
5 VOLTAGE NOISE (nV/Hz)
10
4 GROUP DELAY (ns)
3
2
1
0
1
10
100
1k
1 10
100
1k FREQUENCY (Hz)
10k
100k
FREQUENCY (MHz)
FIGURE 21. GROUP DELAY vs FREQUENCY
FIGURE 22. INPUT VOLTAGE NOISE
-30 HARMONIC DISTORITON (dBc) CURRENT NOISE (pA/Hz) VS=5V AV=+5 -40 RG=50 RL=500 CL=5pF VOUT=2VP-P -50
10
THD 2ND HD
-60 3RD HD -70
1 10
100
1k FREQUENCY (Hz)
10k
100k
-80 0.5
1
10
20
FUNDAMENTAL FREQUENCY (MHz)
FIGURE 23. INPUT CURRENT NOISE
FIGURE 24. HARMONIC DISTORITON vs FREQUENCY (AV=+5)
6
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
-30 HARMONIC DISTORITON (dBc) VS=5V AV=+10 -40 RG=50 RL=500 -50 CL=5pF VOUT=2VP-P -60 -70 -80 -90 0.5 3RD HD -30 VS=5V AV=+5 -40 RG=50 RL=500 -50 CL=5pF -60 -70 -80 -90 THD FIN=1MHz
THD THD (dBc)
THD FIN=10MHz
2ND HD
THD FIN=5MHz
1
10
20
0
1
2
3
4
5
6
7
FUNDAMENTAL FREQUENCY (MHz)
OUTPUT VOLTAGE (VP-P)
FIGURE 25. HARMONIC DISTORTION vs FREQUENCY (AV=+10)
100
FIGURE 26. THD vs OUTPUT VOLTAGE (WORST HARMONIC)
5 OUTPUT SWING GAIN (dB) AV=+5 VS=5V VS=5V AV=+5 3 RG=50 RL=500 CL=5pF 1
OUTPUT IMPEDANCE ()
10
VOUT=0.5VP-P VOUT=1VP-P
1
-1
VOUT=2VP-P VOUT=4VP-P VOUT=6VP-P
0.1
-3
0.01 10k
100k
1M FREQUENCY (Hz)
10M
100M
-5 0.1
1
10 FREQUENCY (MHz)
100
1k
FIGURE 27. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 28. OUTPUT SWING vs FREQUENCY
150 100 AMPLITUDE (mV) AMPLITUDE (mV) 50 0 -50 -100 -150 -20 INPUT 40mVP-P VS=5V AV=+5 RG=50 RL=500 CL=5pF 0 10 20 30 40 50 OUTPUT 200mVP-P RISE TIME 4ns
150 100 50 0 -50 -100 -150 270 OUTPUT 200mVP-P INPUT 40mVP-P FALL TIME 4ns VS=5V AV=+5 RG=50 RL=500 CL=5pF
-10
280
290
300 TIME (ns)
310
320
330
TIME (ns)
FIGURE 29. SMALL SIGNAL PULSE RESPONSE/RISE TIME
FIGURE 30. SMALL SIGNAL PULSE REPONSE/FALL TIME
7
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
2 2
AMPLITUDE (mV)
AMPLITUDE (mV)
1 INPUT 400mVP-P 0 OUTPUT 2VP-P -1 RISE TIME 4.4ns VS=5V AV=+5 RG=50 RL=500 CL=5pF 30 40 50
1 OUTPUT 2VP-P 0 INPUT 400mVP-P FALL TIME 4.4ns
-2 -20
-10
0
10
20
VS=5V -1 AV=+5 RG=50 RL=500 CL=5pF -2 30 40
50
60
70
80
90
100
TIME (ns)
TIME (ns)
FIGURE 31. LARGE SIGNAL PULSE RESPONSE/RISE TIME
FIGURE 32. LARGE SIGNAL PULSE RESPONSE/RISE TIME
3 2 AMPLITUDE (mV) 1 0 -1 -2 -3 -20 VS=5V AV=+5 RG=50 RL=500 CL=5pF -10 0 10 20 30 40 50 AMPLITUDE (mV) OUTPUT 4VP-P SLEW RATE 275V/s
3 2 1 0 OUTPUT 4VP-P SLEW RATE 281V/s
-1 VS=5V AV=+5 RG=50 -2 RL=500 CL=5pF -3 510 520 530
540
550
560
570
580
TIME (ns)
TIME (ns)
FIGURE 33. SLEW RATE (POSITIVE)
FIGURE 34. SLEW RATE (NEGATIVE)
AV=+10 VS=5V
AV=+10 VS=5V
CH1
CH1
CH2
CH2
CH1=1V CH2=200mV 200ns/DIV
CH1=1V CH2=200mV 200ns/DIV
FIGURE 35. ENABLE RESPONSE/TURN-ON TIME
FIGURE 36. DISABLE RESPONSE/TURN-OFF TIME
8
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
20 3.6 RG=50 RL=500 CL=5pF 3.5 AV=+10 AV=+5 3.4
10 IP3 (dBm)
0 VS=5V -10 AV=+5 RG=50 RL=500 CL=5pF -20 0.1 1
SUPPLY CURRENT (mA)
3.3
10 FREQUENCY (MHz)
100
1k
3.2 2.5
3
3.5
4
4.5
5
5.5
6
SUPPLY VOLTAGE (V)
FIGURE 37. THIRD-ORDER INTERCEPT POINT
FIGURE 38. SUPPLY CURRENT vs SUPPLY VOLTAGE
0.03 DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE () 0 10 20 30 40 50 60 70 80 90 100 IRE 0.03 0.01 -0.01 -0.03 -10 0 10 20 30 40 50 60 70 80 90 100 IRE 0.01 -0.01 -0.03 -10
FIGURE 39. DIFFERENTIAL GAIN ERRORS
FIGURE 40. DIFFERENTIAL PHASE ERRORS
-20 VS=5V AV=+5 RG=50 -50 RL=500 CL=5pF f1 -80 2f1-f2 -110 2f2-f1 f1
AMPLITUDE (dBm)
-140 400
440
480
520
560
600
FREQUENCY (kHz)
FIGURE 41. IP3
9
FN7381.4 May 4, 2007
EL5130, EL5131 Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.4 POWER DISSIPATION (W) 1.2
1 0.9 POWER DISSIPATION (W) 0.8
1 909mW 0.8 0.6 435mW 0.4 0.2 0
JA =
SO 8 11 0 C/ W
0.7 625mW 0.6 0.5 0.4 0.3 0.2 0.1 391mW
JA =
SO 8 16 0 C/ W
J SO
A =2
J
T23 -5 A=23 0C /W
SO
T23 -5 56 C/W
0
25
50
75 85 100
125
150
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 42. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 43. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
10
FN7381.4 May 4, 2007
EL5130, EL5131 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
11
FN7381.4 May 4, 2007
EL5130, EL5131 SOT-23 Package Family
e1 A N 6 4
MDP0038
D
SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX 0.05 0.15 0.05 0.06 Basic Basic Basic Basic Basic 0.10 Reference Reference Rev. F 2/07 NOTES:
E1 2 3
E
A2 b c
0.20 C
0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D
D E E1 e e1 L L1 N
0.15 C A-B 2X C D
1
3
A2 SEATING PLANE 0.10 C NX A1
1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only).
(L1)
H
6. SOT23-5 version has no center lead (shown as a dashed line).
A
GAUGE PLANE c L 0 +3 -0
0.25
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12
FN7381.4 May 4, 2007


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